2017.11.20 17:04 "[Tiff] TIFF tag and compression registration", by Kemp Watson
- 2017.11.20 17:34 "Re: [Tiff] TIFF tag and compression registration", by Bob Friesenhahn
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2018.01.16 20:08 "Re: [Tiff] Strategies for multi-core speedups", by
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2018.01.16 00:15 "Re: [Tiff] Strategies for multi-core speedups", by Bob Friesenhahn
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2018.01.15 21:41 "Re: [Tiff] Strategies for multi-core speedups", by Larry Gritz
- 2018.01.15 19:17 "[Tiff] Strategies for multi-core speedups", by Larry Gritz
- 2018.01.15 21:46 "Re: [Tiff] Strategies for multi-core speedups", by scott ribe
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2018.01.16 01:09 "Re: [Tiff] Strategies for multi-core speedups", by Craig Bruce
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2018.01.16 18:36 "Re: [Tiff] Strategies for multi-core speedups", by
- 2018.01.15 23:29 "Re: [Tiff] Strategies for multi-core speedups", by Larry Gritz
- 2018.01.16 18:48 "Re: [Tiff] Strategies for multi-core speedups", by scott ribe
- 2018.01.16 19:01 "Re: [Tiff] Strategies for multi-core speedups", by Kemp Watson
- 2018.01.16 19:34 "Re: [Tiff] Strategies for multi-core speedups", by Paavo Helde
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2018.01.16 18:36 "Re: [Tiff] Strategies for multi-core speedups", by
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2018.01.15 21:41 "Re: [Tiff] Strategies for multi-core speedups", by Larry Gritz
- 2018.01.16 20:18 "Re: [Tiff] Strategies for multi-core speedups", by Kemp Watson
- 2018.01.16 20:23 "Re: [Tiff] Strategies for multi-core speedups", by
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2018.01.16 00:15 "Re: [Tiff] Strategies for multi-core speedups", by Bob Friesenhahn
2018.01.16 00:58 "Re: [Tiff] Strategies for multi-core speedups", by scott ribe
On Jan 15, 2018, at 5:24 PM, Bob Friesenhahn <bfriesen@simple.dallas.tx.us> wrote:
The I/O is not necessarily serialized. When using mmap, pread/pwrite, or asynchronous I/O, the I/O can also benefit from multi-threading given that the underlying storage is a multi-disk array or SSDs using PCIe NVMe (capable of up to 1024 simultaneous I/Os).
Also, I/O calls are likely only to RAM, not to disk, thanks to caching...